The round
Positron AI has raised $875 million at a $5 billion post-money valuation, the Reno, Nevada, chip startup announced on 10 September. The money comes in two parts: a $375 million Series C priced at a $3.5 billion pre-money valuation, and a Series C-1 of up to $500 million.
NEA, Atreides Management, Valor Equity Partners, Andra Capital and SemiAnalysis Capital co-led the Series C. NEA and Netscape co-founder Jim Clark led the C-1. Other backers include DFJ Growth, the Qatar Investment Authority, Hudson River Trading, Cisco Investments and Naver Ventures. Forest Baskett of NEA, Gavin Baker of Atreides, Thomas Jermoluk of the Jim Clark Office and Dylan Patel join the board.
The price has moved quickly. In February Positron raised $230 million at a $1 billion valuation, in a round led by Arena Private Wealth, Jump Trading and Unless. The new round values the company five times higher, Quartz noted.
Memory instead of compute
Positron’s argument is that inference is limited by memory, not arithmetic. Serving a large language model means reading its weights out of memory for every token generated, so memory capacity decides how large a model fits on a chip and memory bandwidth decides how fast it answers. Nvidia’s data-centre GPUs use high-bandwidth memory (HBM), which depends on advanced packaging.
Asimov, Positron’s next chip, uses LPDDR5X instead, the type of memory found in phones and laptops. It will carry between 288GB and 2,304GB per chip, according to the company, which says the choice lets it avoid the supply constraints around HBM and advanced packaging. As SiliconANGLE points out, LPDDR5X is cheaper and easier to get than HBM, but has significantly less bandwidth. Positron’s answer is utilisation: it says its systems use more than 90% of their available memory bandwidth, while most AI accelerators use less than 30% of their HBM’s.
That claim carries the whole design, so the arithmetic matters. The Register calculated in February that Nvidia’s Rubin GPU has 288GB of HBM4 with 22TB/s of peak bandwidth, against roughly 3TB/s for Asimov. Even at 30% of peak, Rubin’s memory would still be about 2.4 times faster by that estimate. Asimov’s case, if it holds, rests on capacity per chip and cost, not raw speed.
Three products, one in the field
Atlas, Positron’s first-generation system, is the one shipping. More than 50 racks are being deployed at Oracle Cloud Infrastructure, where the inference provider Parasail uses the capacity; Jump Trading and i3d.net are also production customers, the company said. Atlas used HBM, according to The Register, so it is not a working example of the LPDDR5X design.
Asimov is due to tape out on TSMC’s N3P process at the end of 2026, with production in the second half of 2027. In February, chief executive Mitesh Agrawal told SiliconANGLE the chip would ship in early 2027. Titan combines four to eight Asimov chips in one node and is aimed, Positron says, at models beyond 16 trillion parameters and context windows beyond 10 million tokens.
Positron also claims a single Titan rack can process up to 26 times as many tokens per dollar as Nvidia’s GB300 NVL72, a figure SiliconANGLE notes comes from simulation data. No Asimov silicon exists yet to measure it against.
What the money buys
The proceeds pay for the Asimov tape-out, a 2MW-plus engineering data centre and emulation platform, and the Titan production ramp, including LPDDR5X supply, production capacity and system integration. “Speed matters in this market, both in how quickly we ship new generations of silicon and in how quickly they reach customers,” Agrawal said.
What to watch
The tape-out date is the first hard test. Production has already moved from early to late 2027, and a slip past the end of this year would push it further. After that, the question is whether independent measurements of Asimov bear out the bandwidth-utilisation figure the design depends on. SemiAnalysis Capital, one of the Series C co-leads, is run by the analyst Dylan Patel, who now also sits on Positron’s board.
